The present invention relates to a semiconductor device including a silicide layer in its source/drain regions and also relates to a method for fabricating the device. The present invention more particularly relates to measures to reduce a junction leakage current.
Recently, as MISFETs included in an LSI chip have their sizes tremendously reduced and their operating speed increased, it has become increasingly necessary for the MISFETs to have their sizes further reduced in accordance with the scaling law. In particular, it has become more and more necessary to reduce the width of the sidewall on the gate electrode and a contact margin provided between the gate electrode and the source or drain region of the MISFETs. Also, for the purpose of reducing the resistivity of the source/drain regions, a process for forming a silicide in the surface regions of the source/drain regions and the gate electrode, i.e., a salicide (self-aligned silicide) process, has been adopted more and more often.
When such a salicide process is adopted, it is necessary to prevent the thickness of the sidewall from being reduced too much while a wet etching process is performed using hydrofluoric acid solution before a metal film for the salicide structure is deposited. For this purpose, a silicon nitride film with high resistibility to the wet etching process is generally used for the sidewall. It is also necessary to prevent the source/drain contact from being shortcircuited with the gate electrode or part of the semiconductor substrate located under the sidewall, e.g., extended or LDD (lightly doped drain) regions, even when the source/drain contact has overlapped with the gate electrode or sidewall. For this purpose, an insulating film to be deposited on the gate electrode and the sidewall are usually made of silicon nitride films with high resistibility to a dry etching process. However, it is known that if the silicon nitride film is deposited directly on the side faces of the gate electrode, the following problems will arise. Specifically, stress might be applied to the channel region of the semiconductor substrate from the silicon nitride film. Also, the durability of the gate insulating film to hot carriers decreases because of harmful effects caused by hydrogen atoms contained in the silicon nitride film. In addition, since the silicon nitride film has a high dielectric constant, the capacitance formed between the gate and the source or drain region might increase where the sidewall consists of the silicon nitride film alone. Thus, the operating speed of the circuit might decrease. To eliminate these problems, the sidewall generally has a double-layer structure made up of a nitride film and a silicon dioxide film, which is interposed between the nitride film and gate electrode and between the nitride film and semiconductor substrate.
In addition, MISFETs are also disposed for the I/O ports on the same semiconductor substrate. These MISFETs have a structure with no silicide layer formed in the source/drain regions so as to ensure sufficient durability for the gate oxide film and good electrostatic discharge (ESD) resistibility. That is to say, the single semiconductor substrate includes regions to be silicided and regions not to be silicided.
FIGS. 6A through 6E are cross-sectional views showing a known method for fabricating a semiconductor device with a poly-metal gate structure. In FIGS. 6A through 6E, only an NMISFET region is illustrated. However, a PMISFET actually exists on another part of the substrate.
First, in the process step shown in FIG. 6A, silicon dioxide, n-polysilicon, metal and silicon nitride films are deposited in this order over a semiconductor substrate 101. Then, a photolithographic process is performed to form a photoresist film as an etching mask over the silicon nitride film. Subsequently, the silicon nitride, metal, polysilicon and silicon dioxide films are patterned by an etching process using the photoresist film as a mask, thereby forming on-gate silicon nitride film 105, upper gate electrode 104 of the metal film, lower gate electrode 103 of the polysilicon film and gate insulating film 102. Thereafter, a photoresist film (not shown) is formed to cover a PMISFET region (now shown). Then, arsenic ions (As+), for example, are introduced into the NMISFET region of the semiconductor substrate 101 at a dose of about 5.0xc3x971014 atomsxc2x7cmxe2x88x922 with an accelerating voltage of about 10 keV applied and with the on-gate silicon nitride film 105 and gate electrodes 104 and 103 used as a mask. In this manner, n-type extended (or LDD) regions 106 are defined in the semiconductor substrate 101.
Next, in the process step shown in FIG. 6B, a silicon dioxide film 107 and a silicon nitride film 108 are deposited in this order to thicknesses of about 20 nm and about 80 nm, respectively, over the substrate by an LPCVD (low-pressure chemical vapor deposition) process, for example.
Then, in the process step shown in FIG. 6C, the silicon nitride film 108 and silicon dioxide film 107 are etched back by an anisotropic etching process, thereby forming a nitride sidewall 108a and an L-sidewall 107a having an L-shaped cross section. Thereafter, arsenic ions, for example, are introduced into the semiconductor substrate 101 at a dose of 5.0xc3x971015 atomsxc2x7cmxe2x88x922 with an accelerating voltage of about 50 keV applied and with the on-gate silicon nitride film 105, gate electrodes 104 and 103 and sidewalls 108a and 107a used as a mask. Subsequently, rapid thermal annealing is performed at a temperature of 1000xc2x0 C. for 10 seconds. In this manner, n-type heavily doped source/drain regions 109 are defined in the semiconductor substrate 101.
Next, in the process step shown in FIG. 6D, before a silicide layer is formed on the heavily doped source/drain regions 109, the following process steps are performed to prevent the silicide layer from being formed in a region not to be silicided (not shown). Specifically, an antireactive silicon dioxide film is deposited by an LPCVD process, for example, to a thickness of about 50 nm over the substrate. Then, a photoresist film is formed on the antireactive silicon dioxide film so as to cover the region not to be silicided and expose the region to be silicided (e.g., the region shown in FIG. 6D). By using this photoresist film as an etching mask, the antireactive silicon dioxide film is wet-etched by a buffered hydrofluoric acid solution diluted to 1:20, for example, for about 30 seconds. In this manner, part of the antireactive silicon dioxide film located over the region to be silicided is removed. In this case, to remove that part of the antireactive silicon dioxide film as much as possible, the antireactive silicon dioxide film is over-etched. However, as a result of this over-etching, the lower edge of the L-sidewall 107a sandwiched between the nitride sidewall 108a and semiconductor substrate 101 is partially etched. Thus, an oxide-removed region Rde is created as shown in FIG. 6D.
Then, in the process step shown in FIG. 6E, the photoresist film is removed by a process such as ashing or RCA cleaning, during which a silicon dioxide film is formed on the surface of the silicon layer (such as the heavily doped source/drain regions 109). Thus, the silicide dioxide film is wet-etched away by a hydrofluoric acid solution diluted to 1:100, for example. As a result of this process, the L-sidewall 107a is further etched. Subsequently, a Co film is deposited to a thickness of about 8 nm over the substrate and then annealed at a temperature of 550xc2x0 C. for 60 seconds, for example, thereby allowing Co to react with Si at the interface between the silicon layer and Co film. As a result, a cobalt silicide (CoSi2) layer 111 is formed on the heavily doped source/drain regions 109. Thereafter, non-reacted parts of the Co film are removed by a selective wet etching process.
By performing these process steps, the resultant device is implementable as a MISFET with a so-called xe2x80x9csalicide structurexe2x80x9d that greatly contributes to downsizing.
However, the known method for fabricating the semiconductor device involves the following drawbacks. Specifically, in the process step shown in FIG. 6D, parts of the semiconductor substrate 101, i.e., parts of the heavily doped source/drain regions 109 and parts of the n-type extended (or LDD) regions 106, are exposed on the oxide-removed region Rde. Thus, the cobalt silicide layer 111 grows laterally in the oxide-removed region Rde under the nitride sidewall 108a. That is to say, parts of the n-type extended (or LDD) regions 106 with a shallow pn junction are silicided. Accordingly, part of the cobalt silicide layer 111 comes into direct contact with a region (i.e., the p-well in this case) of the semiconductor substrate 101. Or that part of the cobalt silicide layer 111 faces the substrate region with the very thin layer of the n-type extended (or LDD) regions 106 sandwiched therebetween. As a result, a non-negligible amount of leakage current flows between the cobalt silicide layer 111 and the substrate region as the p-well. If the substrate includes no n-type extended (or LDD) regions but the heavily doped source/drain regions only, then the silicide layer should be in direct contact with the channel region. Accordingly, the leakage current would further increase in that case.
To eliminate such an oxide-removed region Rde from a double-layer sidewall consisting of L-oxide and nitride sidewalls, the overetched edge of the oxide L-sidewall, i.e., the oxide-removed region Rde, may be filled with another nitride film. (see Japanese Laid-Open Publication No. 11-345963, for example) In that case, however, the additional nitride film is in direct contact with part of the semiconductor substrate near the channel region. As a result, interface states might arise in the semiconductor substrate or the durability of the gate insulating film to hot carriers and the reliability thereof might decrease because of the stress applied to the channel region. In addition, the oxide-removed region, which is as narrow as about 10 to 20 nm in thickness, may be filled incompletely with the additional nitride film depending on the material thereof.
It is therefore an object of the present invention to prevent various characteristics of a semiconductor device, including a sidewall as a stack of silicon nitride and silicon dioxide films, from degrading due to the direct contact of the additional nitride film with the gate electrode or the semiconductor substrate.
It is another object of this invention to minimize the leakage current, which flows when parts of the source/drain regions are silicided, for a device of that type.
Specifically, a first inventive semiconductor device includes: a substrate having a semiconductor layer therein; a gate insulating film formed on the semiconductor layer; a gate electrode formed on the gate insulating film; a nitride sidewall, which has been formed out of a silicon nitride film to surround the gate electrode; a stress-relaxing sidewall, which is interposed between the gate electrode and the nitride sidewall and between the semiconductor layer and the nitride sidewall so as to have an L-shaped cross section; source/drain regions, which have been defined in parts of the semiconductor layer below the gate electrode to horizontally sandwich the gate electrode therebetween; and a silicide layer formed on the source/drain regions. In this device, at least a lower edge of the stress-relaxing sidewall is made of an oxynitride film.
The first inventive semiconductor device includes the stress-relaxing sidewall. Accordingly, various characteristics of the device, e.g., hot carrier durability and reliability of the gate insulating film, do not degrade because the nitride sidewall is not in contact with the gate electrode or semiconductor layer. In addition, since the lower edge of the stress-relaxing sidewall is made of the oxynitride film, no part of the silicide layer exists under the stress-relaxing sidewall. As a result, the semiconductor device ensures excellent characteristics, such as sufficient hot carrier durability of the gate insulating film with the leakage current reduced greatly.
In one embodiment of the first inventive device, the stress-relaxing sidewall may be entirely made of the oxynitride film, not just the lower edge thereof.
A second inventive semiconductor device includes: a substrate having a semiconductor layer therein; a gate insulating film formed on the semiconductor layer; a gate electrode formed on the gate insulating film; a nitride sidewall formed out of a silicon nitride film; a stress-relaxing insulator sidewall; source/drain regions defined in parts of the semiconductor layer below the gate electrode to horizontally sandwich the gate electrode therebetween; and a silicide layer formed on the source/drain regions. The nitride sidewall surrounds the gate electrode so as to have its lower edge come into contact with the semiconductor layer. The insulator sidewall is interposed between the gate electrode and the nitride sidewall.
The second inventive semiconductor device includes the stress-relaxing insulator sidewall. Accordingly, various characteristics of the device, e.g., hot carrier durability and reliability of the gate insulating film, do not degrade because the nitride sidewall is not in contact with the gate electrode. In addition, since the device includes the nitride sidewall, no part of the silicide layer exists under the insulator sidewall. As a result, the semiconductor device ensures excellent electrical characteristics with the leakage current reduced greatly.
In one embodiment of the second inventive device, the nitride sidewall may be made of a silicon nitride containing silicon at a mole fraction exceeding a mole fraction defined by stoichiometry. Then, even if the nitride sidewall is in contact with the semiconductor layer, it is possible to suppress the application of excessive stress from the nitride sidewall to the semiconductor layer.
In another embodiment, the stress-relaxing insulator sidewall may be made up of an additional nitride sidewall and an oxide sidewall. The additional nitride sidewall may be formed out of another silicon nitride film and interposed between the gate electrode and the nitride sidewall. The oxide sidewall may be interposed between the gate electrode and the additional nitride sidewall and between the semiconductor layer and the additional nitride sidewall so as to have an L-shaped cross section.
A first inventive method for fabricating a semiconductor device includes the steps of: a) forming a gate insulating film and a gate electrode in this order on a semiconductor layer in a substrate; b) depositing an insulating film and a silicon nitride film, which have resistibility to a wet etching process to be performed on an oxide film, in this order over the substrate and then anisotropically etching back the insulating film and the silicon nitride film, thereby forming a nitride sidewall and a stress-relaxing insulating film that surround the gate electrode; c) defining source/drain regions in parts of the semiconductor layer below the gate electrode to horizontally sandwich the gate electrode therebetween; and d) siliciding respective uppermost parts of the source/drain regions. The stress-relaxing insulating film is interposed between the gate electrode and the nitride sidewall and between the semiconductor layer and the nitride sidewall so as to have an L-shaped cross section.
According to the first method, before respective uppermost parts of the source/drain regions are silicided, the lower edge of the stress-relaxing insulating film is not etched. Thus, in the step d), no part of the silicide layer exists under the stress-relaxing insulating film to reach the channel region or extended (or LDD) regions. As a result, the leakage current, which should otherwise flow between the silicide layer and the substrate region, can be reduced greatly in the resultant semiconductor device.
In one embodiment of the first inventive method, a silicon dioxide film may be deposited over the substrate by a chemical vapor deposition process and then annealed and densified in the step b), thereby forming the insulating film having the high resistibility to the wet etching process to be performed on the oxide film.
In another embodiment, a silicon oxynitride film may be formed in the step b) as the insulating film having the high resistibility to the wet etching process to be performed on the oxide film.
A second inventive method for fabricating a semiconductor device includes the steps of: a) forming a gate insulating film and a gate electrode in this order on a semiconductor layer in a substrate; b) depositing a silicon dioxide film and a silicon nitride film in this order over the substrate, and then anisotropically etching back the silicon dioxide film and the silicon nitride film, thereby forming a nitride sidewall and a stress-relaxing oxide film that surround the gate electrode; c) nitriding a lower edge of the stress-relaxing oxide film, thereby changing the lower edge into an oxynitride region; d) defining source/drain regions in parts of the semiconductor layer below the gate electrode to horizontally sandwich the gate electrode therebetween; and e) siliciding respective uppermost parts of the source/drain regions. The stress-relaxing oxide film is interposed between the gate electrode and the nitride sidewall and between the semiconductor layer and the nitride sidewall film so as to have an L-shaped cross section.
According to the second method, the leakage current, which should otherwise flow between the silicide layer and a substrate region, can also be reduced greatly in the resultant semiconductor device as in the first method.
A third inventive method for fabricating a semiconductor device includes the steps of: a) forming a gate insulating film and a gate electrode in this order on a semiconductor layer in a substrate; b) forming a stress-relaxing insulator sidewall around the gate electrode; c) depositing a silicon nitride film over the substrate; d) depositing an antireactive oxide film over the silicon nitride film; e) selectively removing part of the antireactive oxide film located in a region to be silicided while leaving the other part of the antireactive oxide film located in a region not to be silicided; f) anisotropically etching part of the silicon nitride film located in the region to be silicided, thereby forming a nitride sidewall on the insulator sidewall so that the nitride sidewall is in contact with the semiconductor layer; g) defining source/drain regions in parts of the semiconductor layer below the gate electrode to horizontally sandwich the gate electrode therebetween; and h) siliciding respective uppermost parts of the source/drain regions.
According to the third method, the region to be silicided is covered with the silicon nitride film when part of the antireactive oxide film is removed, in the step e), from the region to be silicided. Thus, the lower edge of the insulator sidewall is hardly etched away. Accordingly, in the subsequent step g), no part of the silicide layer exists under the insulator sidewall to reach the channel region or the extended (or LDD) regions. As a result, the leakage current, which should otherwise flow between the silicide layer and the substrate region, can be reduced greatly in the resultant semiconductor device.
In one embodiment of the third inventive method, a silicon dioxide film and a silicon nitride film may be deposited in this order over the substrate and then etched back anisotropically in the step b), thereby forming an additional nitride sidewall and a stress-relaxing oxide film around the gate electrode. The stress-relaxing oxide film may be interposed between the gate electrode and the additional nitride sidewall and between the semiconductor layer and the additional nitride sidewall so as to have an L-shaped cross section.
In another embodiment, the step c) may include forming the silicon nitride film of a silicon nitride containing silicon at a mole fraction exceeding a mole fraction defined by stoichiometry. Then, various unfavorable effects on the device, such as the application of excessive stress from the nitride sidewall to the semiconductor layer, can be reduced as much as possible.